The present invention relates to electronic memories and, more particularly, to a dynamic electronic memory requiring only one additional gating transistor per capacitive memory cell to eliminate the need of refreshing the cells through the normal cell accessing lines.
High speed electronic memories are now widely used as the main memory of digital computers and the like. Such memories not only provide high access times, but because of the advances in integrated circuitry, can be designed to require a minimum of space. In this connection, it is now common for a single integrated circuit chip to store more than 4,000 bits of information. Single chips capable of reliably storing 16,000 bits of information are eminent.
Because of its simplicity and the minimum amount of space required for it in integrated circuitry, the single transistor cell memory has become the work horse of the industry. The article entitled "Sense Amplifier Design is Key to One-Transistor Cell in 4,096-bit RAM" by Clinton Kuo et al, appearing on pages 116 et seq. of the Sept. 13, 1973 issued of ELECTRONICS, describes such a memory.
The single transistor cell memory is a dynamic memory, i.e., the electrical charge on each cell indicative of information is capacitatively stored, with the result that such charge needs to be periodically renewed ("refreshed") in view of transistor and capacitor leakage. The refreshing operation is typically conducted by periodically interrupting use of the memory for data processing, and then cycling through the cells to refresh the same. The need to refresh therefore limits the overall speed of dynamic electronic memories, as well as requires additional control circuitry. Because of this, dynamic electronic memories often are not an optimum choice for the main memory of smaller systems, such as microcomputer systems. Such systems typically do not require a sufficient amount of memory to warrant the overhead of the control circuitry and speed limitations associated with dynamic memories. For this reason, so-called "static" memories which do not require a refreshing operation are often used for smaller systems. Each cell of such a static memory often will have as many as six transistors. While the cost per bit of such a memory is quite high, a smaller system typically requires less total main memory so that elimination of the cost and trouble of refreshing is warranted.